文章摘要
王君,孟腾飞,于海洋,王永安,倪烨,袁燕,张倩.基于架桥套刻改进SAW芯片探测工艺研究*[J].,2024,43(6):1297-1301
基于架桥套刻改进SAW芯片探测工艺研究*
Research on improving the detection of SAW chip by alignment and bridging technology
投稿时间:2023-08-14  修订日期:2024-10-30
中文摘要:
      为避免CSP工艺中金属凸点过多,实现SAW芯片的片上测试,提高良品率,本论文研究利用架桥套刻的工艺制备SAW芯片。在叉指图层上制备绝缘桥墩,在绝缘桥墩上制备连通内部电极和外部电极的导电桥,通过绝缘桥墩将导电桥与汇流条隔开,实现内部电极的引出。通过实验验证方案的可行性,利用传统光刻技术在衬底上制备叉指图层,利用套刻对准技术制备覆盖在汇流条上的聚酰胺酸绝缘桥墩,并在绝缘桥墩上制备连接内部电极和外部电极的导电桥,得到SAW芯片。通过探针点测直接片上测试芯片性能,测试结果达到预期要求。
英文摘要:
      In this paper, an approach of alignment and bridging to address excessive metal bumps in the CSP process is proposed, aiming to produce SAW chips with improved on-chip testing capabilities and yield. The proposed method involves the use of an interdigitated layer with an insulating bump that includes a conductive sheet connecting the internal and external electrodes. By separating the conductive sheet and the bus bar through the insulating bump, the internal electrode can be extracted successfully. To verify the feasibility of the approach, experiments are conducted as well. The interdigitated layer is prepared on the substrate using conventional photolithography technology. A polyamic acid insulating bump, covering the bus bar, is generated through engraving alignment techniques. Subsequently, a conductive sheet is assembled on the insulating bump, connecting the internal and external electrodes, resulting in the fabrication of SAW chips. Direct probe point measurements are carried out to evaluate the performance of the SAW chip, and the obtained results successfully meet the expected requirements.
DOI:10.11684/j.issn.1000-310X.2024.06.012
中文关键词: SAW芯片  绝缘桥墩  架桥套刻  CSP封装
英文关键词: The SAW chip  The insulating bump  Alignment and bridging  Chip Size Packing
基金项目:(号码) :无
作者单位E-mail
王君* 北京航天微电科技有限公司 北京 100854 wjwjun@126.com 
孟腾飞 北京航天微电科技有限公司 wjwjun@126.com 
于海洋 北京航天微电科技有限公司 wjwjun@126.com 
王永安 北京航天微电科技有限公司 wjwjun@126.com 
倪烨 北京航天微电科技有限公司 wjwjun@126.com 
袁燕 北京航天微电科技有限公司 wjwjun@126.com 
张倩 北京航天微电科技有限公司 wjwjun@126.com 
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